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- Newsgroups: comp.sys.amiga.hardware
- Path: news-1.csn.net!ub!dsinc!scala!scott
- From: scott@scala.scala.com ("Scott Drysdale")
- Subject: Re: x86 must die it's over-priced junk
- Message-ID: <1996Feb24.023705.11898@scala.scala.com>
- Date: Sat, 24 Feb 1996 02:37:05 GMT
- References: <Pine.SUN.3.91.960207172950.9405A-100000@pasta> <Pine.BSD/.3.91.960208091306.27921A-100000@ecf2.puc.edu>
- Organization: US Research and Development - Scala Inc.
-
- In article <Pine.BSD/.3.91.960208091306.27921A-100000@ecf2.puc.edu> ":=Rob=:" <rldickin@puc.edu> writes:
- >NOT! Sure the '486 has a higher clock rate, sure it has faster
- >instructions, but thats not all that counts.
-
- sure it is. of course, the denser 68K instruction set means code is
- typically around 10% smaller for the 68K than the x86. but nobody
- cares about code size in the PC world anymore. speed is everything.
-
- >Have you ever compared the
- >68000 series instruction sets with the 8086 series instruction sets?
- >Motorolas instructions are much more flexable and operate on so much more
- >in the same instruction that Intels processors.
-
- ever use DBRA on the 68K? notice that it only uses a 16 bit count? is
- this good?
-
- look up FBSTP in the 486 manual some time :)
-
- >For example, compare the
- >68000 with the x86 in simple data moves. The 68000 can move 32 bits from
- >memory to memory in one instruction where the x86 has to move it into a
- >register first, then to memory.
-
- this almost doesn't matter in a machine with an instruction cache. memory
- to memory moves are also fairly rare, except block moves, and the x86 has
- a plethora of block operation instructions.
-
- >Besides the fact that the 68000 has 31
- >general purpose 32-bit registers and operates on 32-bit data where old
- >compatable x86 software runs with two 16-bit registers that have limited
- >uses.
-
- the 68000 has 8 data registers and 8 address registers. one of the address
- registers is 'special purpose' (the stack pointer). that makes 15 32-bit GP
- registers. the 32-bit x86 processors (386 and up) have 4 32-bit data
- registers and 4 32-bit "address" registers, one of which is the stack
- pointer, giving 7 32-bit GP registers. note that the "data" registers
- can usually be used like address registers. that's a little more than two
- 16 bit registers, don't you think? how much 8086 code (change all 32-bit
- refs above to 16 and you've got an 8086) do you think is out there any more?
-
- as to your blatherings about die size, etc, consider that the 040 and 060
- leave a lot of floating point (and some integer instructions) out of the
- chip and thus they must be emulated in software. this makes moto's die
- smaller, but obviously the emulated instructions go alot slower. all the
- intel chips have all the instructions (fp included) of their earlier
- editions. the x86 family is also saddled with the weird V86 mode and other
- overbaked MMU tricks.
-
- >I dare to include my signature:
- >:=Rob=:
-
- ooh.
-
- i'm no fan of the little-i company (after all, "intel" is less than half
- "intelligent"). i just have been dealing with both the 68K and x86 for
- years on a pretty even basis. a 386 or higher running in 32-bit mode
- is just as "good" as a 68K machine as far as feature/speed comparisons
- go.
-
- remember that the 68K is really a big PDP-11, and the 8086 is really a
- big 8080, which was a big 8008, which was a big 4004. once intel hit
- the 386, they had most of the brain damage fixed.
-
- --
- Scott Drysdale // Scala Inc. // scott@scala.com // 1960 HD FLH // AMIGA!
- Sanitation Engineer // "where you gonna go when your 8520's blow?"
-